Certain processors, and other instruction execution apparatuses, conventionally implement higher-level machine instructions as lower-level microinstructions or micro-operations. A decoder decodes macroinstructions into either microinstructions or entry point vectors to a microcode flow in a microcode storage. If a macroinstruction is decoded into an entry point vector to a microcode flow in the microcode storage, the decoder initiates the microcode storage. Such initiation uses up one or more clock cycles, in which the decoder is typically idle. The microcode storage adds microinstructions of the microcode flow into an instruction queue, and when finished returns to the decoder (instructs the decoder that the microcode storage is finished writing to the instruction queue). The return from the microcode storage to the decoder also uses up one or more clock cycles, in which the decoder is typically idle.
In some instances microcode architectures include a loop streaming detector. However, such loop streaming detectors typically do not detect loops that include microcode flows. For such loop streaming detectors, if a microcode flow is detected, then a sequence of microinstructions is typically disqualified for use in a loop.